EDN

Trip points for IC-timing analysis

If you are a budding timing-analysis engineer or even a veteran, understanding trip points, which all major timing-analysis tools incorporate, is essential. Engineers use trip points in ...
EDN

Altos Targets Statistical Timing Models

To develop new cell characterization tools for IC designers working on complex SoCs at 90nm, 65nm and 45nm process technologies Altos Design Automation Inc. has been formed with emphasis on the ...
Semiconductor Engineering

Timing Library LVF Validation For Production Design Flows

Variation modeling has evolved over the past several years from a single derating factor that represents on-chip variation (OCV), to Liberty Variation Format (LVF), today’s leading standard format ...
Design-Reuse

Magma Announces SiliconSmart ACE Memory Characterization -- Embedded FineSim Pro Enables Most Accurate Characterization of Timing, Power and Noise Models

SAN JOSE, Calif., May 10, 2010-- Magma(R) Design Automation, a provider of chip design software, today announced SiliconSmart(R) ACE Memory Characterization, the latest addition to the ...
Indiatimes

555 TIMER IC

The 555 timer IC is an integrated circuit (chip) which is used in a variety of timer, delay, pulse generation, and oscillator applications. 555 Signals and Pinout (8 pin DIP) Figure below shows the ...
Semiconductor Engineering

Model Variation And Its Impact On Cell Characterization

EDA (Electronic Design Automation) cell characterization tools have been used extensively to generate models for timing, power and noise at a rapidly growing number of process corners. Today, model ...