“The chip combines the low latency of SRAM-first designs with the long-context support of HBM,” MatX co-founder and Chief Executive Reiner Pope wrote in a blog post today. “These elements, plus a ...

MatX raises $500M to develop AI chips for large language models and compete with Nvidia, enabling advanced applications.

The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option. The initial goal ...

Researchers at NYU Tandon School of Engineering have created VeriGen, the first specialized artificial intelligence model successfully trained to generate Verilog code, the programming language that ...

LLM-aided interface for Open Source Chip Design,” was published by researchers at University of Bristol and Rutherford Appleton Laboratory. Abstract “The growing complexity of hardware design and the ...

Global energy efficiency is a critically underutilized route to reducing emissions and creating trillions in annual savings, even without new technological innovation. The immediate and indiscriminate ...

CEO Anirudh Devgan outlined how the company is positioning its electronic design automation (EDA), hardware, and intellectual ...

ISSCC addressed challenges for electronics to meet AI demand, AI to speed up the design and training the next generation ...

These new models are specially trained to recognize when an LLM is potentially going off the rails. If they don’t like how an interaction is going, they have the power to stop it. Of course, every ...