Viterbi and Reed-Solomon encoder and decoder intellectual-property (IP) cores from 4i2i Communications Ltd. have been optimized for use with Actel Corp.'s nonvolatile, single-chip ProASICPlus, ...
San Jose, Calif. – Tool vendor Magma Design Automation Inc. has formed a series of alliances with silicon intellectual-property providers to fit their IP into the Magma tool flow. Companies in the ...
T2M-IP, a global semiconductor IP provider and ASIC services partner, today announced the global availability of its complete RISC-V CPU IP portfolio, spanning ultra-low-power MCU-class cores to ...
All three cores are available in synthesizable VHDL or Verilog and are verified using Artisan Components' TSMC 0.18-µm standard cell library. They come with cycle- and bit-accurate ANSI C++ or SystemC ...
ATHENS, Greece--(BUSINESS WIRE)--IP Highlights: - Fully compliant with VESA DSC 1.2b and backwards compatible with DSC 1.1 - Ultra-low latency visually lossless image compression for all types of ...
Fibre Channel intellectual property (IP) cores have been developed for FPGAs, with the cores presently optimized for Stratix, Stratix GX, Cyclone, and Hardcopy devices. Initial offerings include three ...
GLEN ROCK, New Jersey – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectual Property (IP) soft cores, today announced enhanced capabilities within its DB9000 Display ...
Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and ...
The solution will be a core building block in the Italian broadcaster's move to SMPTE ST 2110 for master control rooms and production control rooms ...
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